In general, in this kind of semiconductor device, when the integrated circuits mounted on the printed circuit board are high-speed ICs, it is necessary to consider impedance matching at various points on transmission lines printed on the printed circuit board so as to enable transmission of high-speed signals transmitted from drive side ICs (for example, signals changing from low level to high level at a high speed) to receiving side ICs in a manner such that the signal waveforms are not destroyed.
FIG. 1 shows the concept of an example of this kind of semiconductor device in the prior art, wherein a single drive side IC 6 mounted on a printed circuit board 10 drives two receiving side ICs 7 and 8 (that is, there are two fan-outs). The high-speed signal transmitted from a package lead 61 (one of the package leads of the drive side IC 6) for signal output in the drive side IC 6 passes through a transmission line formed by a microstrip line 91 printed on the printed circuit board 10 to transmit the signal data successively to the receiving side ICs 7 and 8, and, finally, is absorbed by the terminating resistor 95 connected between the end of the transmission line and the ground.
In the figure, reference numeral 62 is a drive side IC chip, 71 and 72 are package leads and a chip of the receiving side IC 7, and 81 and 82 are package leads and a chip of the receiving side IC 8. Note that, in the figure, for brevity's sake, an example is shown of the connection of two receiving side ICs 7 and 8 to a line for transmitting high-speed signals transmitted from a single drive side IC 6. But in actuality, a large number of receiving side ICs will be connected to the transmission line and these receiving side ICs will in turn function as drive side ICs for ICs connected successively in cascade on the printed circuit board.
As shown in the figure, further, in the semiconductor device of the example of the prior art, when connecting the receiving side ICs 7 and 8 to the microstrip line 91 which serves as the transmission line (so-called trunk line), the microstrip lines 92 and 93 (that is, branched transmission lines) branched (as so-called incoming lines) from the microstrip line 91 are formed by printed wiring on the printed circuit board 10 in the same way as the microstrip line 91. The ends of these microstrip lines 92 and 93 are connected to package leads of the receiving side ICs 7 and 8, respectively, each of which package leads is one of the plurality of package leads of the receiving side ICs which acts as an input pin.
In particular, when these ICs are high-speed ICs, as mentioned above, when forming the transmission line by printed wiring on the printed circuit board, special consideration is given to impedance matching in the layout of the transmission line. In the above structure, the characteristic impedances Z.sub.0 of each of the microstrip lines 91, 92, and 93 are all formed to be, for example, 50 ohms (the value of the characteristic impedance is determined based on the width of the printed wiring, the dielectric constant and the thickness of the insulator used for the printed circuit board, etc.) and the terminating resistor 95 is also formed to be 50 ohms.
In this construction, if the lengths of the microstrip lines 92 and 93, each branched from the microstrip line 91 and led into each of the receiving side ICs 7 and 8, are 1.sub.1 and 1.sub.2, respectively, when the degree of high speed of the signals transmitted through the same, as further clarified later, is within a range where the existence of the branched microstrip lines 92 and 93 each having the lengths of 1.sub.1 and 1.sub.2 are tolerable, there is no special problem in the transmission of the signals due to the construction of the above-mentioned example of the prior art. But, when the transmitted signals become higher in speed, it becomes impossible to neglect the existence of the branched microstrip lines 92 and 93 with regard to such high-speed signals, the existence thereof becomes the cause of mismatching of the transmission lines.
Explaining this point further, FIG. 2 shows an equivalent circuit of the semiconductor device of the example of the prior art shown in the above-mentioned FIG. 1. For brevity's sake, the drive side IC 6 and the receiving side ICs 7 and 8 are comprised of one-input gates 65 and 75 and 85. Further, the input impedances of each of the receiving side ICs 7 and 8 are sufficiently high compared with the impedance of the transmission line (50 ohms). Reference numeral 95 shows a terminating resitor (50 ohms). The connection point of the transmission lines 91 and 92 is shown as point A.
Assume now that a voltage waveform signal which rises from the level L to the level H is transmitted at the time t.sub.0 from the drive side IC 6, as shown in FIG. 3(a) and that the signal having this rising edge waveform reaches the branching point at the receiving side IC 7, that is, the above-mentioned point A, after the time T.sub.1. If so, then the left-hand side of point A in FIG. 2 becomes a 50 ohm transmission line, and the right-hand side of point A becomes a 25 ohm transmission line (that is, the branched transmission line 92 (50 ohms) and the transmission line (50 ohms) on the right-hand side of point A (terminating resistor side) are connected in parallel), whereby at a time t.sub.1 after time T.sub.1, since the signal transmitted from the drive side IC is branched, the voltage of the point A only rises to the intermediate level of the level H of the transmitted signal.
Part of the signals passing through a microstrip line 92 having a length 1.sub.1 from point A to reach the receiving side IC 7, are reflected at the input side of the receiving side IC 7, and again pass through the microstrip line 92 having a length 1.sub.1 to return to point A. The signals are transmitted to the microstrip lines 91 and 92, but part of the signals are reflected again toward the microstrip line 92 by mismatching at the point A. The same is subsequently repeated.
In this way, the voltage waveform of point A has an intermediate level portion over a time corresponding to the time T.sub.2 where part of the signals travel back and forth over the microstrip line 92 (that is, pass over the 2l.sub.1 length of transmission line), as shown in FIG. 3(b). In particular, the time T.sub.2 during which the intermediate level is exhibited cannot be ignored for high-speed signals with a fast rising time (acute rising edges) of the voltage waveform (for example, this can lead to a high level being mistaken as a low level and an erroneous operation). Of course, the smaller the value of 1.sub.1 (the shorter the length of the branched microstrip line 92), the shorter the time T.sub.2 during which the intermediate level is exhibited can be made, but there are limits to how far printed wiring techniques can go even in shortening 1.sub.1. In particular, with high-speed signals with an acute rising edge (or trailing edge) such as mentioned above, there is the problem in that the disturbance in the signal waveform due to the branched microstrip line 92, that is, the line used as the incoming line to the receiving side IC 7 (that is, the branched transmission line) cannot be ignored.
Note that, although reference above was made to the branch connected microstrip line 92 with respect to the receiving side IC 7, it is clear that a similar problem exists with the branch connected microstrip line 93 with respect to the other receiving side IC 8.
To solve the above problems, the present applicant previously proposed, as shown in FIG. 4, a semiconductor device wherein the package leads of a receiving side IC (for example, indicated by the symbol 2) to which signals transmitted from the drive side IC 1 are input are comprised of a pair of external leads 211 and 212 and an internal lead 213 connecting the pair of external leads 211 and 212 inside the package and wherein the pair of external leads 211 and 212 are connected respectively to the drive side transmission line 41 and terminating side transmission line 42 (see Japanese Unexamined Patent Publication (Kokai) No. 61-152047).
Note that FIG. 4 shows the case of a single drive side IC 1 mounted on a printed circuit board 10 driving two receiving side ICs 2 and 3 and that, at the receiving side IC 3 also, the package leads are comprised of the afore-mentioned external leads 311 and 312 and internal lead 313. The pair of external leads 311 and 312 are connected respectively, seen from the receiving side IC 3, to the drive side transmission line and terminating side transmission line. Note that, in the figure, at the receiving side IC 2, 22 denotes package leads other than the above-mentioned package leads for signal input (for example, package leads for connection to the power source or for signal output), 23 is a chip, 25 is a pad provided on the chip 23, and 24 is a wire connecting the internal lead 213 and pad 25. Further, at the receiving side IC 3, there are provided package leads 32 like the above-mentioned package leads 22, a chip 33, a pad 35, and a wire 34. Further, the drive side IC 1 in some cases acts as a receiving side IC with respect to the drive side IC of the former stage. In such a case, package leads to which signals from the drive side IC of the preceding stage are input are comprised of a pair of external leads 121 and 122 and an internal lead 123 connecting these external leads inside the package.
FIG. 5 shows an equivalent circuit of the semiconductor device shown in the above-mentioned FIG. 4, wherein the drive side IC 1 and the receiving side ICs 2 and 3 are shown as comprised of one-input gates 15, 20, and 30. The high-speed signals transmitted from a package lead 11 of the drive side IC 1 pass through a transmission line comprised of the microstrip line 4 printed on the printed circuit board 10. The signal information is transmitted successively to the receiving side ICs 2 and 3 through the package leads (211, 213, 212; 311, 313, 312) and the signals are finally absorbed at a terminating resistor 45 (for example, 50 ohms) connected between the end of the transmission line 4 and ground. The characteristic impedance Z.sub.0 of the microstrip line comprising the transmission line 4 is formed as, for example, 50 ohms. Further, in this case, the impedances of the package leads connected to the transmission line (211, 213, 212; 311, 313, 312) are formed as 50 ohms in consideration of the impedance matching with the transmission line.
It has been considered that, by making the construction in this way, the disturbances in the signal waveform can be eliminated even with high-speed signals with acute rising edges by making the transmission line including the package leads of the receiving side ICs a impedance-matched line.
However, even with a semiconductor device of such a structure, the intervals between the above-mentioned internal leads 213 and 313 and the pads 25 and 35 provided on the IC chips 23 and 33 are connected by wires 24 and 34, respectively. Therefore, the portions after the connection point of the internal leads 213 and 313 and the wires 24 and 34 become the above-mentioned branched transmission lines, and there is still a possibility of mismatching due to the existence of such branched transmission lines. Depending on the degree of speed of the high-speed signals, disturbances may still occur in the signal waveform and stable operation cannot be ensured, so problems still remain.